Serial-data links embed clocks in their data streams, and those clocks must be recovered at the receiver end. This Design Idea describes a data/clock-recovery algorithm for an NRZ (non-return-to-zero) ...

The NPIC6C596A is a power logic 8-bit serial-in/serial or parallel-out shift register designed to have open-drain outputs that consist of 33 V/100 mA continuous current extended-drain NMOS transistors ...